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Jarosław Sugier, PhD
Email: jaroslaw.sugier@pwr.edu.pl
Unit: Faculty of Information and Communication Technology (N) » Department of Computer Engineering
ul. Z. Janiszewskiego 11/17, 50-372 Wrocław
building C-3, room 227
phone +48 71 320 3996
Office hours
- Monday 12.00-14.00
- Thursday 14.00-15.00
- Friday 14.00-15.00
Research fields
- Implementing algorithms in hardware; hardwatre description languages; programmable logic devices.
Recent papers
2017
- Sugier J., Simplifying FPGA implementations of BLAKE hash algorithm with block memory resources. Procedia Engineering, 2017, vol. 178, s. 33-41.
2016
- Sugier J., Implementation efficiency of BLAKE and other contemporary hash algorithms in popular FPGA devices. Dependability Engineering and Complex Systems: Proceedings of the Eleventh International Conference on Dependability and Complex Systems DepCoS-RELCOMEX, June 27 - July 1, 2016, Brunów, Poland. Springer, 2016. s. 457-467.
2015
- Sugier J., Efficiency of FPGA architectures in implementations of AES, Salsa20 and Keccak cryptographic algorithms. Journal of Polish Safety and Reliability Association, Summer Safety and Reliability Seminars. 2015, vol. 6, nr 2, s. 117-124.
2014
- Sugier J., Low cost FPGA devices in high speed implementations of Keccak-f hash algorithm. Proceedings of the Ninth International Conference on Dependability and Complex Systems DepCoS-RELCOMEX, June 30 - July 4, 2014, Brunów, Poland. Springer, s. 433-441.
2013
- Sugier J., Anders G.J., Modelling and evaluation of deterioration process with maintenance activities. Eksploatacja i Niezawodność - Maintenance and Reliability, 2013, vol. 15, nr 4, s. 304-311.