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Wojciech Dawidowski, PhD
Email: wojciech.dawidowski@pwr.edu.pl
Unit: Faculty of Electronics, Photonics and Microsystems (N) » Department of Microelectronics and Nanotechnology
ul. Długa 61-65, 53-633 Wrocław
building M-11, room 120
phone +48 71 320 4940
Recent papers
2018
- López-Escalante M. C., Ściana B., Dawidowski W., Bielak K., Gabás M., Atomic configurations in AP-MOVPE grown lattice-mismatched InGaAsN films unravelled by X-ray photoelectron spectroscopy combined with bulk and surface characterization techniques. Applied Surface Science. 2018, vol. 433, s. 1-9.
- Kosa A., Stuchlíková Ľ., Harmatha L., Kováč J., Ściana B., Dawidowski W., Tłaczała M., DLTS study of InGaAs and GaAsN structures with different indium and nitrogen compositions. Materials Science in Semiconductor Processing. 2018, vol. 74, s. 313-318.
2017
- Szyszka A., Dawidowski W., Stafiniak A. P., Prażmowska-Czajka J., Ściana B., Tłaczała M., Cross-sectional scanning capacitance microscopy characterization of GaAs based solar cell structures. Crystal Research and Technology. 2017, vol. 52, nr 6, art. 1700019, s. 1-5.
2016
- Dawidowski W., Ściana B., Zborowska-Lindert I., Mikolášek M., Bielak K., Badura M., Pucicki D., Radziewicz D., Kováč J., Tłaczała M., The influence of top electrode of InGaAsN/GaAs solar cell on their electrical parameters extracted from illuminated I–V characteristics. Solid-State Electronics. 2016, vol. 120, s. 13-18.
- Kósa A., Stuchlíková Ľ., Harmatha L., Mikolášek M., Kováč J., Ściana B., Dawidowski W., Radziewicz D., Tłaczała M., Defect distribution in InGaAsN/GaAs multilayer solar cells. Solar Energy. 2016, vol. 132, s. 587-590.
- Ściana B., Badura M., Dawidowski W., Bielak K., Radziewicz D., Pucicki D., Szyszka A., Żelazna K., Tłaczała M., LP-MOVPE growth of high Si-doped InGaAs contact layer for quantum cascade laser applications. Opto-Electronics Review. 2016, vol. 24, nr 2, s. 95-102.
- Pucicki D., Bielak K., Badura M., Dawidowski W., Ściana B., Influence of GaInNAs/GaAs QWs composition profile on the transitions selection rules. Microelectronic Engineering. 2016, vol. 161, s. 13-17.